Yanyan Zhang
Newbie level 4
Hi! I tried to model a planar interdigital capacitor above a grounded silicon substrate in HFSS. The substrate thickness is 280um, and the size of the port extension of the capacitor is 1.24um. I used 2 lumped ports for simulation of the capacitance, both port sizes are 1.24um*280um. I found that the arrow of the mode at the port is distributed only on top of the port, instead of pointing to the ground. For comparision, I also used IE3D with the advanced extension ports to simulate. It turned out that the result in HFSS is much bigger than that in IE3D ( 100 times). While I increased the mesh density of the fingers in HFSS, it seemed little help to explain the result difference with IE3D. I wonder if something is wrong with the port setup in HFSS, maybe the port is too long in such a thick substrate. Could somebody give me some advice? Thanks!