cise
Newbie level 2
- Joined
- Apr 6, 2006
- Messages
- 2
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- 1,281
- Activity points
- 1,299
I got a circuit netlist including TX and RX blocks supposedly located on different dice. It'd be helpful to run transient simulation with separate process corners for the subcircuits, say SS for TX and FF for RX.
The problem is, all the devices point to a same library which includes a bunch of parameters and macro-models. Therefore it'll be very difficult to modify the library and create model names like "pmos_tx", "nmos_rx".
Does anyone have idea about how to define local process corner for each subcircuit in Hspice?
Appreciate a lot!!
- - - Updated - - -
I just tried a way which may works.
Divide the netlist into two subcircuits and use .lib's to define corner in each subckt. Also, remove the .lib in top level.
Seems working.
The problem is, all the devices point to a same library which includes a bunch of parameters and macro-models. Therefore it'll be very difficult to modify the library and create model names like "pmos_tx", "nmos_rx".
Does anyone have idea about how to define local process corner for each subcircuit in Hspice?
Appreciate a lot!!
- - - Updated - - -
I got a circuit netlist including TX and RX blocks supposedly located on different dice. It'd be helpful to run transient simulation with separate process corners for the subcircuits, say SS for TX and FF for RX.
The problem is, all the devices point to a same library which includes a bunch of parameters and macro-models. Therefore it'll be very difficult to modify the library and create model names like "pmos_tx", "nmos_rx".
Does anyone have idea about how to define local process corner for each subcircuit in Hspice?
Appreciate a lot!!
I just tried a way which may works.
Divide the netlist into two subcircuits and use .lib's to define corner in each subckt. Also, remove the .lib in top level.
Seems working.