Thanks! My audio sample rate is <15KHz only, but my codec has been configured to give 32 bits with 0.5µs time period or at 2MHz bit clock. Two successive frame sync occurs at 8µs interval for ch1(16bits) and another 8µs for ch2(16bits). followed by this I have an idle time of 48µs. So a total time is approx 64µs\15KHz.
Now I gotta use this 48µs time to collect,add header,marker,etc and send it out. I guess you got it this time....I can ofcourse get uniform bits from codec, but since there are some post-processing,this idle time is necessary. ok, You concept of bit insertion seems so interesting and helpful... Thanks a lot. Let me give it a try. Altogethor I got to know about another idea. This is followed in HDLC level encoding. As you know the "bit-stuffing", the starter sync bits are selected as "01111110". Six '1's followed by two 0s at front and back. This value has been chosen since it is a less redundant code after all in data. Now if a data comes in this same pattern, for instance, then all you need to do at the coding level is to add a zero at the 6th position as like this ----> "01111-0-10". Then your data follows.so in receiver unit when it detects a zero after '1' in 5th position, then it simply discards the '0' at 6th bit and retrieves the data. So in this way i guess we can sync our data at 8-bit level without more overhead.if it slips or gains at the receiver unit....Also could you telll me that by implementing a CRC in this model might help for synhronization apart from error detection?....Any suggestion?