UsernameIsValid
Newbie level 3
I am using Zynq development board, on which I am generating some kind of pulse inside PL. I want to sample this pulse/clock into RAM to be able to read it from software on the PS core (to get sort-of oscilloscope view).
Since my pulse is currently being generated at about 100-200MHz, I guess I will need to down sample it to something slower for PS software to be able to capture it.
How do I do that in verilog?
Since my pulse is currently being generated at about 100-200MHz, I guess I will need to down sample it to something slower for PS software to be able to capture it.
How do I do that in verilog?