how to reduce the effect of pad parasitics on ldo output

[arya.jagadeesh]

HI,
When i tried to find the psrr after applying pad parasitics ...when i apply ac in supply which goes to internal to chip , i am seeing a spike of in my supply just after pad parasitics...how to reduce it.

max how many pads i can have in parallel

 

[AMS012]

Putting enough decaps on the node connected to the pad (internally to the chip) should help improve the PSRR. Maximum number of pads you can have depends on how many you want to allocate. Typically, I have seen 3-4 bond pads being tied together to reduce the inductance.