is there any way we can reduce harmonics at the output stage of an io output buffer which has architecture like corelevel signal -> levelshifter->predrivers->GTO driver -> output to the pad..
Make sure of enough overdrive (cmos) or degeneration (bjt). degradation starts at overdrive/1.414. any overdrive problems leads to harmonics. slew rate limitation will also cause sine to be distorted, hence each stage should be biased with sufficient current. hope this helps.
A high speed opamp (either voltage mode or current mode) shall serve you well in moderate frequency applications.
Actually emitter degeneration is a feedback example essentially.
If you run at high frequency, try feedforward/preditortion as in PA design.
External bandpass / low pass filters are quick fix. But you shall keep it as the last resort. Specially keep an eye on the stop band impedance of these filters.