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how to reduce glitches in negative charge pump?

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sapphire

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Hi,

I am designing a gain=1 negative charge pump using SC circuit. Whenever the switches are turning on/off, there will be certain amount of glitches at the output. We can try to slow down the transition to reduce the glitches, but it will also degrate the efficiency of the NCP. Is there any better way to do this?

Thanks,
Sapphire
 

lsfeng

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How about this problem ?
 

dick_freebird

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It's all about controlling current and voltage edge-rates.
This does increase switching losses, more time spend in
dissipative operating regions. You have to choose / optimize,
no free lunch. But for low current demand I think you will
not see a huge efficiency hit just from slowing pump
waveform edges.
 

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