it is possible to do a lot of things with VHDL. And it would be fine to read them into an array.
The errors you are getting makes me think you are trying to synthesise the code rather than simulate, because there is nothing wrong with the code for simulation. But my thoughts include:
1. With the current code, you are only going to read the first value from each line in the decimal.txt file
2. you have declared a type called "decimal", which is a file of integer. Why? you are reading a text file not a data file.
3. you cannot have an inout port of type integer
4. When you get to the end of the file, it is going to start all over again from the start of the file. Processes loop forever.