Well, crystal is used as a master clock of your system..if you are familiar with basic PLL system then you know that reference clock/master clock is fed into the system:
system clock>Phase detector>Low pass filter>VCO------>output
[Note: it has a feedback loop meaning sample of output will be feedback to PD and PD will take the difference--pls read abou it]
There are quiet a few kind of crystal such as VCTCXO (internal temperature citcuit, thick in size, additional components), VCXO (thin in size, no internal temp. compensation, temp comp. is done in SW algorithm) and DCXO (digitally controlled and no external component, temp comp is done via SW algorithm). Now, when you pick a crystal you walk through its S-curve whcih shows the crystal performance (corner samples+ordinary ones) @ different tempratures. To have a robust system, all these crystal should be varified on all set of conditions making sure frequecy error (LB: +/-90Hz, and HB: +/-180Hz or so , or 0.01ppm I beleive w.r.t carrier freuency).
Bottom line is your frequency offset with the network should be within the limit as we do not want to see your DUT causing interference with other uses assigned in different frequency.