Avii13
Newbie level 3
- Joined
- May 1, 2013
- Messages
- 4
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- 1,281
- Location
- Delhi
- Activity points
- 1,304
I have written a VHDL code for PRBS. Its working fine.
Now i want to add clock skew to know the threshold value of delay after which PRBS will not work. Say clock reach at FF1 at T time and the same clock reach at FF2 at T+t1 time.
I used
process
begin
WAIT FOR 20ps ;
if clk'event and clk = '1' then
q <= d ;
end if;
end process ;
but its not working
How can I add this "t1" delay in clock in VHDL.?? Please sugeest
Now i want to add clock skew to know the threshold value of delay after which PRBS will not work. Say clock reach at FF1 at T time and the same clock reach at FF2 at T+t1 time.
I used
process
begin
WAIT FOR 20ps ;
if clk'event and clk = '1' then
q <= d ;
end if;
end process ;
but its not working
How can I add this "t1" delay in clock in VHDL.?? Please sugeest
