die size estimation brings into discussion of core limited n pad limited design !!
n more over i am nt sure ..whether package size is fixed or die size..
luking for ans frm other members !
cheers,
Shiv
what is the number of IO pads ?
what is the least perimeter in which they can be arranged while meeting all DRC of wirebond ?
can you breakout to your ballmap with this arrangement ?
Is your core area larger than the area you get by arranging pads in square/rectangle above ? ( std cell area + analog blocks + routing etc...)
any specific requirement abt pad placement from floorplan of core ?
you need to explore all these questions to get to die size...