ed2000
Member level 3
I have a flattened GDSII layout and would like to perform extraction of the whole circuit of the chip.
It is more or less clear how to perform extraction of the circuit at the transistor level.
But is there any known way for extraction of the circuit at the level of standard cells?
Which tools can be used for that?
:?:
Thanks for any relevant info.
It is more or less clear how to perform extraction of the circuit at the transistor level.
But is there any known way for extraction of the circuit at the level of standard cells?
Which tools can be used for that?
:?:
Thanks for any relevant info.