Alan_yi
Newbie level 6
clock jitter model
As the title.
I am going to simulate the smapling jitter effect and pulth width jitter influence on the SNDR of delta sigma modulator. So I need to model the clock jitter and pulth width jitter in simulink. Does any one know how to model them in Matlab and simulink? I need the code badly.
Thanks!
As the title.
I am going to simulate the smapling jitter effect and pulth width jitter influence on the SNDR of delta sigma modulator. So I need to model the clock jitter and pulth width jitter in simulink. Does any one know how to model them in Matlab and simulink? I need the code badly.
Thanks!
