how to interface a SDRAM with AHB

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sumi

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dw_memctl

how to design a memory controller for sdram(micron MT48LC2M32B2) using AMBA AHB...
wat r the basic modules required... what would be the operation of each module...
the coding should be done in verilog . looking forward for a faster response from anybody..pls
 

dw_memctl help

Refer to the docs of Synopsys DesignWare DW_memctl
The basic function and i/o required are all provided.
 


If u r looking for a useful or even faster response.. You should be specific with your question ... Do ur homework and ask specific doubts issues related to design... may be I (or someone else)can help u

FOr Information regarding AMBA read AMBA spec from www.arm.com

Find one SDRAM controller @ **broken link removed**
Also look into www.opencores.org and Xilinx.com for some free cores..

and USE GOOGLE 2 find lotsa information u need.

regards
 

making AMBA signals compatible to that of SDRAM signals
 

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