Re: Common drain buffer
Hmm, I think I didn't quite understand how this buffer works.
When I read about it in electronics books, I see 2 (there are more, but usually I see these two) basic topologies.
1) MOSFET + resistance : Here we start with a bias current Ids. Now if that bias current Ids is flowing, we can calculate Vgs from equation Ids = K(Vgs -Vt)². If the current Ids would now be constant, Vgs would be constant too and the voltage at the source would just follow the voltage at the gate (minus the offset Vgs), hence the name source follower.
Problem: If the voltage at the gate changes, so would Ids, since there is no constant current source. This implies that gm changes and this produces non-linearities.
2) MOSFET + MOSFET : If we replace the resistor with a current source, in this case a MOSFET, we get a 'constant' current source and this implies Vgs, Gm, ... would be constant. This makes this source follower a better topology.
Is this correct?
If so, what is the importance if Ids? I mean what are the relevant factors when choosing a biasing current Ids?