How to increase SNDR in FLASH ADC?

[tshankar501]

I am doing flash adc and I am getting a signal energy of around 63 dB for some input frequency and for some amplitude but I am getting a distortion of 45 dB and noise of around 40 dB which reduces from SNDR of the ADC. How do I reduce the distortion energy and noise energy? I am using hanning window, computing the fft, and from that I am finding the signal energy, distortion energy and noise energy.

Any help would be greatly appreciated.

Added after 2 minutes:

My sampling freq is 1GHz. input freq is 50.5 Mhz for this case and my amp is full peak to peak....

 

[maxwellequ]

Can you post the FFT figure, so that we can help ?

Regards,

 

[tshankar501]

I am attaching the fft plot that I am getting....

 

[andy2000a]

you means design a Flash ADC IC or use stand alone ADC ?

maybe you can check your ASIC clock , clock jitter will reduce SNDR ..

 

[maxwellequ]

I'm assuming that you're testing a real ADC. If you're still simulating it some of the questions below are not applicable:
-What is the resolution of the ADC?
-What is the number of points in the FFT? You should use something above 2^14... I would advise 2^16.
-Is the yy-axis the signal power in dB ? If yes, how come there are negative values ? If not, please post it.
-The even-order harmonics are significant: the input of your ADC is differential or single-ended? If it is differential how are you generating it?
-Are you using any filter on the input signal ? Or putting it in a different way, how do you guarantee that the input signal is good enough in terms of noise and distortion?
-Are you also computing INL/DNL ? If yes, please post it.

Regards