A signal is varying slowly. We want it to reach its final value quickly which effectively means increasing the slope of the signal. How can we do it??
This was asked to me in an interview, and a hint was given -- 'use invertors'
Can anyone suggest a solution...
I think that if you used two cascaded inventers with high current, and with large noise margin, it may increase da slope, or decreas rise and fall times..
signal would vary slowly because of high resistance offered to it, we can decrease the resistance by increasing the width of transisitor, correct me if i am wrong.
as W/L is inversely proportional to the resistance.
if this i smeant for a digital buffer driving a large cap., you can use exponential inverter chain as suggested by Rabaey in his book "Digital integrated circuits- A design prespective"