Thanks again,
my clock frequency is 8MHz and I checked the clock overlap, it is 10psec. Do you think this tiny overlap can make SINAD so poor?
as MOS size is concerned, it is not that large, I mean its effective capacitance I have taken into account when put my passive capacitance. And I did check, the capacitor is discharging properly, and I checked the RC time ocnstant. They are all fine.
regarding XPART, I found it is =1 for the MOS model, I found in the internet it means drain/source charge sahring 0/100........ Do I have to change my SINAD programme so that it give me right result?
or do I have to make XPART =0?