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big impedance between supply node to output node can increase low frequency PSRR, for high frequency PSRR Peak you should add some decouple capacitor to decrease the load impedance seen to ground at that frequency.
If i am expecting input signal at speed of 10 samples per second...should I look PSR at 10 Hz or at DC ??
Also for the folded cascode opamp with class AB stage i am getting a Power Supply rejection of -40 dB at DC which falls to -10 dB at 10Hz and eventually settles at flat responce of 0 dB after 1KHz ..?
how do i interpret it ? is it good, bad ? how do i improve it if I am already using cascode output stage ( giving high resistance betn +ve Vdd and output node )