Dec 6, 2010 #1 F fantastic0422 Newbie level 1 Joined Dec 6, 2010 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Location Taiwan Activity points 1,287 Hi all: I'm designing a 10 bits 100MHz/s Pipeline ADC by using OP sharing. I wanna change my architecture from 1.5 b/stage to 2.5b/stage due to power optimization. But I don't know how to design the 6-to-3 encoding circuit in subADC. Where can I find the specific schematic diagram? Or someone can help me out ! Many thx.:-D
Hi all: I'm designing a 10 bits 100MHz/s Pipeline ADC by using OP sharing. I wanna change my architecture from 1.5 b/stage to 2.5b/stage due to power optimization. But I don't know how to design the 6-to-3 encoding circuit in subADC. Where can I find the specific schematic diagram? Or someone can help me out ! Many thx.:-D
Dec 8, 2010 #2 Z zhangfuquan Newbie level 4 Joined Jul 8, 2009 Messages 5 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Location china Activity points 1,303 freshman...