how to handle large numbers in VHDL

[malikkhaled]

hi,

i am doing encryption and decryption and my algorithm inputs sizes is 256 bits. in test bench i am getting an error like "555677895559 exceeds maximum integer value ", although i didn't declare it as an integer.
constant P: std_logic_vector(255 downto 0):=x"2523648240000001ba344d80000000086121000000000013a700000000000013";
i declare P as constant and perform A+B mod P and A-B mod P based on Cin. any suggestion or comment from your's side?

 

[K-J]

hi,

i am doing encryption and decryption and my algorithm inputs sizes is 256 bits. in test bench i am getting an error like "555677895559 exceeds maximum integer value ", although i didn't declare it as an integer.
constant P: std_logic_vector(255 downto 0):=x"2523648240000001ba344d80000000086121000000000013a700000000000013";
i declare P as constant and perform A+B mod P and A-B mod P based on Cin. any suggestion or comment from your's side?

Using VHDL integers breaks down at 32 bits, since you need something larger you should be using 'signed' and 'unsigned' types from the ieee.numeric_std library. Vector length of these types is virtually unlimited (i.e. you can have on the approximately 2^32 bits in the vector as opposed to just 32 bits that represents integers).

Kevin Jennings

 

[TrickyDicky]

i am doing encryption and decryption and my algorithm inputs sizes is 256 bits. in test bench i am getting an error like "555677895559 exceeds maximum integer value ", although i didn't declare it as an integer.

Sounds like you're doing a conversion somewhere....

 

[malikkhaled]

Using VHDL integers breaks down at 32 bits, since you need something larger you should be using 'signed' and 'unsigned' types from the ieee.numeric_std library. Vector length of these types is virtually unlimited (i.e. you can have on the approximately 2^32 bits in the vector as opposed to just 32 bits that represents integers).

Kevin Jennings

yes i am using unsigned types from ieee.numeric_std library. in test bench i used a conversion function to convert decimal into binary like
"a<= conv_std_logic_vector (1157777,256)", i think the problem could be here i need your suggestion.

 

[TrickyDicky]

well for a start, conv_std_logic_vector is not in the numeric_std library, so you must be using a non-standard library.
Second, you cannot convert integers to large arrays like that. You'll have to do it in 32 bit chunks and concatenate them or slice the ranges:

--concatenate
a <=   x"00000000" --255 downto 224
     & x"00000000" --223 downto 192 
      ...etc
     & std_logic_vector( to_signed(1157777, 32) );

--slices
a <=  (31 downto 0 => std_logic_vector( to_signed( 1157777, 32) ), others => '0');

 

[std_match]

This function can convert decimal integer constants of any size (written as a string) to "unsigned":

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Code VHDL - [expand]
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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
 
function decimal_string_to_unsigned(decimal_string: string; wanted_bitwidth: positive) return unsigned is
  variable tmp_unsigned: unsigned(wanted_bitwidth+3 downto 0) := (others => '0'); -- 4 extra bits to detect overflow
  variable character_value: integer;
begin
  for string_pos in decimal_string'range loop
    case decimal_string(string_pos) is
      when '0' => character_value := 0;
      when '1' => character_value := 1;
      when '2' => character_value := 2;
      when '3' => character_value := 3;
      when '4' => character_value := 4;
      when '5' => character_value := 5;
      when '6' => character_value := 6;
      when '7' => character_value := 7;
      when '8' => character_value := 8;
      when '9' => character_value := 9;
      when others => report("Illegal number") severity failure;
    end case;
    tmp_unsigned := tmp_unsigned(wanted_bitwidth-1 downto 0) * to_unsigned(10, 4);
    tmp_unsigned := tmp_unsigned + character_value;
    if tmp_unsigned(wanted_bitwidth+3 downto wanted_bitwidth) /= "0000" then
      report("Too large number") severity failure;
    end if;
  end loop;
  return tmp_unsigned(wanted_bitwidth-1 downto 0);
end decimal_string_to_unsigned;

---

It can be used like this:

---

Code VHDL - [expand]
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a <= decimal_string_to_unsigned("1157777", 256)
a <= decimal_string_to_unsigned("12345678901234567890", 256)

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It is a slightly modified version of the function I posted in this thread:

https://www.edaboard.com/threads/247443/