How to fix the Vds after plotting the gm/Id vs. Id/W

[Chan-Hsiang Weng]

when I simulate the circuit, and plot the gm/Id vs. Id/W, th Vds should be fixed.

but how to fix it?? my simulation conditions is tsmc18rf and use a single nmos.

Vdd=1.8V, Ib=2mA, RL=159, C=10pF, just the same condition with Boris handout

but different process, how should I do to fix vds ?? just plus a ideal vds between

drain and source ?? I feel this is unreasonable. could someone can answer me the

question? thanks

 

[hmsheng]

gm/id methodology

Remove the load resistor.

 

[yschuang]

id vs vgs for second order effect

The following link might be helpfu.
**broken link removed**

 

[amitjagtap]

how to get gm id ro

I think to plot gm/ID Vs Normalized current Vds is not fixed.
TO plot gm/ID Vs ID/W a diode connected (Drain and gate shorted )configuration dof the transistor is used. and the supply voltage connected to drain with sweep from 0 to (say) vdd.
Read the following attached doc( 3rd subpart ). I think this will be helpfull to u.

 

[qslazio]

id vs vds

I think you should connect NMOS as a diode

 

[sutapanaki]

reverse square law related with id and vds

Id/W vs. gm/Id does not depend to first order on Vds, which is quite enough accuracy for design purposes. This being so, you can connect gate to drain or you can fix a voltage source to the drain, another one to the gate and sweep the gate one. But be careful to keep the transistor in saturation. If you connect it as diode it is always in saturation.

 

[rajivbhatia]

plot gm vs id

Id/W vs. gm/Id does not depend to first order on Vds
hi Sutapanaki, can u plz tell me this in more detail....
What i have seen is mostly diode connected confuration is used to plot Current density plot.
HOwever for subthreshold region Current Density Plot I had used fixed bias at drain. and veriable at gate.Eventhough Gm/ID Vs Id/W is used for all transistor regions.

 

[sutapanaki]

subthreshold gm ids

I'll try to give you a kind of a hand-waving explanation. Imagine a transistor with Vds=0 and Vgs>Vth. Obviously a triode region of operation and the amount of Vgs above Vth defines how thick the channel will be i.e. how much charge we have there. Now start increasing the Vds. When Vds=Vdsat, the channel pinches off at the drain side and transistor goes into saturation, but we still have the whole of Vds over the entire channel . Further increase in Vds will move the pinch-off point towards the source. The voltage across the channel is still about Vdsat and the difference between Vds and Vdsat falls across the depletion region between the tip of the channel and the drain. But Id is still mainly defined by the channel charge not by the depletion region and by the amount of Vgs. So is the gm. So, gm doesn't change with Vds, Id doesn't change with Vds and gm/Id doesn't change with Vds. Of course this is very much an ideal case. There are second order effects like DIBL that bring to some dependence of gm/Id on Vds, but I think those could be ignored.
A more mathematical explanation and assuming square law transistor:
Id=K(Vdsat)^2(1+lambda.Vds) (1)
gm=dI/dVgs=2KVdsat(1+lambda.Vds) (2)
from (1) and (2) follows:

gm/Id=2/Vdsat

and no dependence on Vds.

In subthreshold the MOS transistor is more like a bipolar with weak dependence on Vce or Vds too. So no matter how you do your simulations - diode connected or with a fixed drain voltage source you should get comparable results. However, if you accidentally put the transistor in triode, then you will get also some dependence on Vds.

Id/W vs. gm/Id does not depend to first order on Vds
hi Sutapanaki, can u plz tell me this in more detail....
What i have seen is mostly diode connected confuration is used to plot Current density plot.
HOwever for subthreshold region Current Density Plot I had used fixed bias at drain. and veriable at gate.Eventhough Gm/ID Vs Id/W is used for all transistor regions.

 

[holddreams]

gm id-k

How to get gm using spectre simulator?

 

[patriot]

get gm id

How to get gm using spectre simulator?

this may be helpful

 

[pkbhardwaj]

modern process id vds simulation

Are you talking about 2D data matrix codes.if this is your question i can help.

 

[jecyhale]

ro gm id

Ｊｕｓｔ　ｃｏｎｎｅｃｔ　ｔｈｅ　Ｄｒａｉｎ　ｔｏ　ＶＤＤ　ａｎｄ　ｓｏｕｒｃｅ　ｔｏ　ＧＮＤ．
Ｄｏｎ‘ｔ　ｎｅｅｄ　ａｎｙ　ｒｅｓｉｓｔｏｒ．

 

[linrb]

fixed bias gm circuits edaboard

How to get gm using spectre simulator?

what is your meaning? Looking at the results of simulation in spectre?

 

[lvlei0309]

plot gm/id

I agree with 4th

 

[hyc]

gm/id

Refer to the document provided by amitjagtap (gm-id-examples.pdf), page 4, and page 7 (Intrinsic Gain Simulation), what is the reason that gm*ro will decrease after certain voltage vds=1.6 or so in that case? Also, according to its step 2, how to take deritive of Id vs Vds from the SPICE output datapoints, are we supposed to make the output step small enough so that the deritive will be approximated by (Id-Id(n-1))/(Vds-Vds(n-1))?

Thanks,

 

[sutapanaki]

create gm ro id

gm*ro drops because of decreasing ro for high Vds. There could be different effects for this - drain in effect acts like a second gate increasing Id, also bigger Vdb means more reverse current through the drain-bulk junction (for modern technologies). Possibly also some effect like punch-through if the channel length is too small. In short, Id increases for higher Vd and ro drops.
For the derivative - every good simulator should have post-processing of the results where you can do derivatives and other math operations. Shouldn't be a big deal.