Violation question!!
For fixing Hold violation between two registers,
various techniques are there,
1. try to add delays cells in between the registers without violation setup timing
2. try to utlize usefull skew in the clock paths betwwen two registers.
etc..
for Fixing setup,
1. try to optimize data path between two registers, without violation hold timing
2. try to fix the transition violation in the data path.
3. swapping low driving cells with high driving cells.
etc....
all the above techniques can be used based upon the suitable conditions, without creating further violations