hi
i am working on sigma delta adc
one query :
how to find hte input range for sigma delta modulator for which the adc can work properly
please suggest
Manissri
Ideally, it is equal to Full Scale Level of Feedback DAC or little small than it.
By the way, what abstract level for your DSM-ADC is ?
Signal Flow Model Level ?
Energy Conservative(=Voltage and Current) Behavioral Model(Verilog-A) ?
Transisto Level ?
Hi thanks for your reply
actually it is on transistor level
and this ADC is a ratio metric kind of Vin/vref (duty cycle ratio) kind of sigma delta modulator
Do you mean your DSM-ADC is Continuous Time Type and Feedback DAC is RZ(=Return Zero) Type with non 50% duty ?
It seems your DSM-ADC is Continuous Time Type and Feedback DAC is RZ by simple resistor with voltage source of Vref.
Resolution internal Quantizer is 2Level, that ios 1bit.
Right ?
Answer the followings.
(1) Basic Scheme of Integrator.
Continuous Time or Discrete Time(=Switched Capacitor) ?
(2) Order of Loop Filter of DSM(Delta Sigma Modulator)
(5) If your DSM-ADC is Continuous Time Type, what scheme of Feedback DAC do you use ?
Voltage Type DAC(Register with voltage source) ?
Currebt Type DAC ?
hi
i am working on sigma delta adc
one query :
how to find hte input range for sigma delta modulator for which the adc can work properly
please suggest
Manissri
the maximum test input sinewave amplitude is the Vref that goes in the feedback... also the snr is maximum for an input sinewave of an amplitude around 6dB less than the vref...