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I have done vhdl coding of 8b/10b circuit based on lookup table method and circuit method. I have to find the execution time of this two coding to compare it.
There's no such thing as "execution time" in logic design. We have logic propagation delay, clock speed of synchronous logic and possibly pipeline delays.
In a synchronous 8b/10b decoder or encoder, the clock speed is usually equal to the symbol rate. Timing analysis assures that the implementation can keep up with the clock rate.
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