How to explain jitter accumulation

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Kristya

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As for a single VCO, output clock wave is far more different from the wanted when the test time grows.can this call jitter accumulation?
if not ,what is the real performance of jitter accumulation?

As I found, PLL and DLL can reset jitter accumulation whereas VCO can't ,why ?


Thank you for your help
 

First question: I think it's the jitter accumulation.
Second question: PLL and DLL can do that because of loop system. The error will be feed back and control in the loop.
 

Open loop frequency error is a phase shift integral over time.

Closed loop with phase detector and adequate bandwidth, uses negative feedback and phase detector as integrator to null the phase error.
 

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