How to evaluate the mismatch of current mirror by simulation

[dyjguilin]

Hello all,

I'd like to ask a quest that how to evaluate the mismatch effect by running simulation
current mirror:M1 and M2; M1=10u/3u, M2=(2*10u)/3u

by evaluating the mismatch, adding a vdc source (vos) in gate and running the simulation

my question are:
1. Does this idea that running simulation correct?
2. what is the value of vos? consider the Vth mismatch is K/squrt(W*L), what value to W*L should be used, M1 or M2?

 

[erikl]

Re: How to evaluate the mismatch of current mirror by simula

1. Does this idea that running simulation correct?

Sure, if you can estimate/calculate a reasonable worst case Vos value.

2. what is the value of vos? consider the Vth mismatch is K/squrt(W*L), what value to W*L should be used, M1 or M2?

For worst case evaluation, you'd apparently use the smaller FET, i.e. M1 .

For a more extensive consideration on this topic, see