Re: PLL
One of the best thing I found for PLL was spectreVerilog simulator included in cadence IC environment. But this is true only if you have complex PLL with large digital core. In such case you can replace analog components (VCO, PFD, Charge pump ....) with veriloga model, and use verilog model for digital cell. This will allow you to evaluate structure in minutes instead of days.
Generaly behavioural modeling of the components that are not under test will cut down significantly your simulation time.
For the full transistor level simulation you can use hsim, it has decent accuracy but is VERY fast (about 4-5 times faster then spectre simulator for PLL case, they claim it is 40 X faster in digital circuit simulations). There is also ultasim and some simulator from synopsis, but I never used either of those.