Feb 14, 2019 #1 S sreejeesh_sreedharan Newbie level 1 Joined Feb 14, 2019 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 6 How to Dump e-vcd File in Verilog HDL ?
Feb 14, 2019 #2 C ckqee Newbie level 3 Joined Feb 6, 2017 Messages 4 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 24 If I recall correctly, you cannot dump out an EVCD file using Verilog HDL - the simulation tool has the capability to do that. Which simulation tool are you using?
If I recall correctly, you cannot dump out an EVCD file using Verilog HDL - the simulation tool has the capability to do that. Which simulation tool are you using?
Feb 14, 2019 #3 T ThisIsNotSam Advanced Member level 5 Joined Apr 6, 2016 Messages 2,549 Helped 397 Reputation 794 Reaction score 464 Trophy points 1,363 Activity points 14,767 sreejeesh_sreedharan said: How to Dump e-vcd File in Verilog HDL ? Click to expand... Using $dumpvars in verilog you can only dump into a VCD file. For e-VCD you need an external tool to do it for you. Most simulators can do that.
sreejeesh_sreedharan said: How to Dump e-vcd File in Verilog HDL ? Click to expand... Using $dumpvars in verilog you can only dump into a VCD file. For e-VCD you need an external tool to do it for you. Most simulators can do that.