Hi Khisha,
As the setup given in your circuit, you can not have both P1 and N2 in saturation, since P1 is in saturation with gate connected to gnd!, it's drain voltage must be less than or = Vtp. Now this much low drain voltage prevents N2 to go in saturation, for which you need high drain voltage of magnitude more than VgN2DC-Vtn.
To drive both in saturation, one option is to reduce DC component of gate input of N2. You can try different w/l for pmos current mirror but here also you need to monitor operation region of P1. As far as this circuit is concerned, i don't think without adding additional feedback circuitry it's good to drive both in saturation.