how to do loop stability simulation without breaking the loop

[diodelite]

how to do loop stability simulation without breaking the loop? Can someone provide a brief description? Thank you.

 

[dgnani]

Most moderm simulator allow placing a 0 V source within the loop and run a specific analysis to simulate the loop gain. The method used is usually Tian's. What simulator are you using ?

 

[LvW]

Most moderm simulator allow placing a 0 V source within the loop and run a specific analysis to simulate the loop gain. The method used is usually Tian's. What simulator are you using ?

1.) Yes - in principle, that is correct. But it is a 1 V source which is placed inside the loop.

2.) However - this method does break the ac voltage loop! And that is the reason for a loading error at the opening - unless this source is placed where a low-resistive output (for example opamp output) is connected to a high-resistive load.

3.) A similar effect can be observed using a current source which injects a current into one selected node. In this case, the current loop is opened. However, the loading error can be kept within limits if a node is selected where a high output resistance (example: collector node of a BJT) is connected to a low-resistive feedback path.

4.) Both methods are combined and lead to a 100% correct loop gain using the method as desribed by TIAN and/or Middlebrook.

5.) In this context, it is to be noted that there is another method which does not touch the feedback loop at all. Using this method, a current is injected into the output of the closed loop system and the frequency-dependent output impedance is determined by simulation or measurement. This impedance exhibits something like a resonant effect and it is possible to determine the Q-value of this characteristic. This Q-value can be translated into the phase margin using a special formula. This method is known as a "non-invasive phase margin" determination.