gate level simulation fpga
If your FPGA logic needs to drive GSR or GTS, then search your ISE Libraries Guide for a special primitive such as STARTUP_SPARTAN3 (substitute your FPGA type name). However, most projects don't need to do this.
I've never explicitly used GSR or GTS in any of my projects. During simulation, I simply include glbl.v into the list of files being compiled so the testbench can properly initialize the various Xilinx library primitives that require them. If you launch ModelSim from ISE Project Navigator, I think it automatically includes glbl.v somehow. (I normally run ModelSim from a command-line script.)
I'm not familiar with ISE's simulator, sorry.