How to disable JTAGEN on ATMEGA Family

[dopshim]

How to disable JTAGEN on ATMEGA Family with ISP programmer

I have been facing this problem for a while. I only have an ISP programmer, and programming ATMEGA microcontrollers (in my case ATMEGA32 and ATMEGA16), AVRStudio has happened to set JTAGEN bit to 1 when not being able to read the fuse bits, restoring its own default values. And after programming with that flag by mistake, now the programmer can't program the micro-controller again. I don't have a JTAG programmer, so how can I reset the fuse bits? :sad: It's getting a real pain to buy new ones, and I really don't need a JTAG programmer. Please help me! Thanks in advance.

 

[FvM]

There's apparently a misunderstanding. It won't be a problem to set JTAGEN, you have to care about not disabling SPIEN. But this is basically blocked in SPI programming mode (ISP).

So I wonder what you actually did to lock out further ISP programming? The most popular method is to select an unavailable clock source, particularly external clock oscillator. In this case, an auxilary clock has to be supplied during ISP operations, as describe in the ATMega data sheet under SPI Serial Programming and Verify.

 

[dopshim]

Thank you for the guidance. I have 2 ATMEGA32s that happen to have the exact same problem. One of them had become so yesterday, so I removed it from the breadboard and put it on the zif socket on the programmer to use the on-board oscillator. It was successful, so I guess you are right. But the other one, couldn't be programmed this way. I am sure that the exact same thing happened, I programmed it and then it couldn't be programmed again. Could it be something else? Thanks anyway, you saved me an ATMEGA32! And gave me some kind of confidence about the future problems!

 

[FvM]

It's possible to reset SPIEN, but it shouldn't work through SPI itself. So I wonder, if the processor has been damaged somehow. Generally, at worst case, you need a parallel programmer to restore ISP capabilties of the ATMega. Many general purpose parallel programmers are able to handle it, by the way.