For a cascode, the gain is approximately
= gm*ro^2 = gm * (1/(Lemda*Id))^ So if you keep the bias Id unchanged while increase the width you can boost your gain. However, large transistor increase the node capacitance hence limit the bandwidth. Run the simulation to dertermin the trade off.
Be aware not to simply increase the bias Id as gm=sqrt(2*Id*Beta), increase Id will LOWER your gain!
"Design of analog cmos integrated circuits" by Razavi has a good example to determine transistor size of folded cascode ota, perhaps it can give u some guide.