1. We consider the 4bit situation and get the truth table
Define,
Input datain [3:0];
Output P2nd [1:0]; //If exist second 1, the position of second 1
Output P1st [1:0]; // the position of first 1
Output exist; //Second 1 exist
Output only1; //Only 1 exist
Truth table,
Datain[3:0]
Datain[3:0] Only1 exist P2nd[1:0] P1st[1:0]
0000 0 0 00 00
0001 1 0 00 00
0010 1 0 01 01
0011 0 1 01 00
0100 1 0 10 10
0101 0 1 10 00
0110 0 1 10 01
0111 0 1 01 00
1000 1 0 11 11
1001 0 1 11 00
1010 0 1 11 01
1011 0 1 01 00
1100 0 1 11 10
1101 0 1 10 00
1110 0 1 10 01
1111 0 1 01 00
2. After the 1st stage, we could get
Exist[7:0];
Only1[7:0]
P2nd0[1:0]; //the first 4 bit, if second 1 exist, the postion of second 1
P2nd1[1:0], P2nd2[1:0], P2nd3[1:0], P2nd4[1:0], P2nd5[1:0], P2nd6[1:0], P2nd7[1:0];
P1st0[1:0]; //the first 4 bit, the postion of first 1
P1st1[1:0], P1st2[1:0], P1st3[1:0], P1st4[1:0], P1st5[1:0], P1st6[1:0], P1st7[1:0];
Always @(Exist[1:0] or Only1[1:0] or P2nd0[1:0] or P2nd1[1:0] or P1st0[1:0] or P1st1[1:0] ) begin
Casex({Only1[1:0],Exist[1:0]})
4’bxx-x1: P1_0_2nd = P2nd0[1:0];
4’bx0-10: P1_0_2nd = P2nd[1:0] + 4;
4’bx1-10: P1_0_2nd = P1st1[1:0] +4;
4’b00-00: P1_0_2nd = 0;
4’b01-00
1_0_1st = P1st0[1:0];
4’b10-00
1_0_1st = P1st1[1:0] + 4;
4’b11-00
1_0_2nd = P1st1[1:0] + 4;
endcase
end
3. If the timing is tight, we could insert pipeline, At most, we need 4 stage pipeline for calculation, but in 90ns, I think we could reach 800Mhz,