I know the procedure to design a synchronous counter. Not sure we can apply the same design produres for the design of asynchronous counter or not. I could not find an example in the references book mentioned in my first post. Also, I could not find any example using Google... It's weird. Therefore, any help is very appreciated.
From a first look, i think those equations are for a syncronous counter, not an asynchronous. I don't have time right now to look into it and say for sure.
But if they are indeed for asynchronous i'd like to know too how we concluded those equations.
I think that An asynchronous counter Can use edge-trigerred FF.
It 's called Asynchronous because there is no one clock driving all it's FF,
The first FF is driven by the clock, the second one takes it's clock from the output of the first one, the third takes it's clock from the output of the second, and so on..
So there is no Contradiction between using edge-Triggered FF in implementing Asynchronous Counter
The equations given above are correct. Ive check it.
the procedure are roughly derscribe as:
1.) make state diagram
2.)make state table
3.) Set JK inputs
4.) Make K map for JK inputs
5.)you get your equation