turtlewang
Member level 2
Hello everyone,
I am studying the design of frequency divider. I have met a latch architecture shown in the following figure. Does anybody know the name of this type of latch?
What are the advantages of this type of latch over the CML latch?
And How do I size the transistors in the latch?
Can anybody give me some materials about latch design?
Thanks very much!
![latch.gif latch.gif](https://www.edaboard.com/data/attachments/7/7874-4594a66f2cfc184e42ae5314a3c6ad06.jpg)
![latch.gif latch.gif](https://www.edaboard.com/data/attachments/7/7874-4594a66f2cfc184e42ae5314a3c6ad06.jpg)
![latch.gif latch.gif](https://www.edaboard.com/data/attachments/7/7875-fb5ca21184c332dbb461c273ae92c3b5.jpg)
I am studying the design of frequency divider. I have met a latch architecture shown in the following figure. Does anybody know the name of this type of latch?
What are the advantages of this type of latch over the CML latch?
And How do I size the transistors in the latch?
Can anybody give me some materials about latch design?
Thanks very much!
![latch.gif latch.gif](https://www.edaboard.com/data/attachments/7/7874-4594a66f2cfc184e42ae5314a3c6ad06.jpg)
![latch.gif latch.gif](https://www.edaboard.com/data/attachments/7/7874-4594a66f2cfc184e42ae5314a3c6ad06.jpg)
![latch.gif latch.gif](https://www.edaboard.com/data/attachments/7/7875-fb5ca21184c332dbb461c273ae92c3b5.jpg)
Last edited: