Hi,guys, can you tell how to design large size output drivers(inverter) with large capacitive loads,with low on resistance(30 ohm). How to design layout in order to avoid latch up?
Re: How to design large inverter with large capacitive load
Large capacitive load for the inverter is a short circuit condition. This means that you have to work in this condition , have a short circuit protection and go slowly with the long ramps. You can change your output voltage to a proportion of the energy which your IGBT or output stage can support ( measure the desaturation on the IGBT ) and react to a short circuit condition within 4uS).
Greetings
Dragan
Re: How to design large inverter with large capacitive load
legend said:
Hi,guys, can you tell how to design large size output drivers(inverter) with large capacitive loads,with low on resistance(30 ohm). How to design layout in order to avoid latch up?
what's ur output swing? and what's ur application ?
if ur output is CMOS, (0 , 5V) then, 30 ohm is not a big deal in power electroics, cause ur current surge is only 5/30=166mA .
but if ur application is not for power electronics, u should take care the shoot-through whenever PMOS & NMOS turn on at the same time. and use multi-bonds for that pad to reduce the ground bounce.
1. First, avoid pmos and nmos turn on at same time, that will waste lots of power.
2. Seperate PMOs and NMos by about 15~20um.
3. Insert double guide line around PMOs or NMmos.
Re: How to design large inverter with large capacitive load
legend said:
Hi,guys, can you tell how to design large size output drivers(inverter) with large capacitive loads,with low on resistance(30 ohm). How to design layout in order to avoid latch up?