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How to design divide by 4.5 frequency divider?

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gck

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Hi,

can anybody tell me, how to design divide by 4.5 frequency divider.

thanks in advance
 

Re: frequency divider

To do that you will need two blocks: division by 9 and multiplication by 2 ..
2/9 = 1/4.5 ..
To multiply be 2 you can use XOR gates (7486) and generate two pulses: one at the falling edge and one at the rising edge ..
To divide by 9 you can use 7490 decimal counter in :9 configuration ..
.. see pictures below ..

Regards,
IanP
 
Re: frequency divider

This logic is not preferred for synthesis. Try to use both positive and negative edges to derive the clock.
 

Re: frequency divider

there is pdf called clock dividers made easy... i think it will be available in this forum... it contains synthesisable circuits for all sort of clock dividers withn explainations... try searching it...
 

frequency divider

Dear loardship,
could you please reupload it. Because I could'nt find it seen the huge amound of pdf available.
Thanks.
 

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