How to design clock multiplier which can multiply input clock frequency by 4

[indomitable12345]

i want to design a clcock multiplier which can multiply the input clock frequency by 4....can anyone please help me with its design....

 

[satyakumar]

Re: clock multiplier

If you want to use PLL then itz simple, just use divide by 4 ckt in feedback path.

 

[sumit_techkgp]

clock multiplier

You need a PLL
Sumit

 

[uditkumar1983]

clock multiplier

Hi
I am also having same Doubt of Clock multiplier but I wants to design this circuit purely digital ( Without PLL and DLL) with 50% duty cycle ....Whats is it possible ???
Thanks in advance