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how to design an 8-bit sigma delta ADC

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A sigma-delta over-samples the signal at a high rate to give a 1-bit data steam with low resolution. This signal is then averaged (decimated) to give a slower data word rate with more than 1-bit resolution and accuracy. The number of bits you get depends upon the over-sample rate and the degree of decimation and filtering.
 

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From the figure, x(n) is the 1-bit stream. After the digital filter and decimator, what will be y(n) be?
 

View attachment 83785

From the figure, x(n) is the 1-bit stream. After the digital filter and decimator, what will be y(n) be?
y(n) will be a series of digital words with bit-length and word frequency determined by the degree of oversampling, filtering, and decimation used.
 

does this mean 8-bit sigma delta ADC will have "8 times oversampling (8*Fs)" -> after the SDM will produce "8-one bit stream (1011 0111)" and will need a decimation filter with 8:1 decimation factor" ???
 

does this mean 8-bit sigma delta ADC will have "8 times oversampling (8*Fs)" -> after the SDM will produce "8-one bit stream (1011 0111)" and will need a decimation filter with 8:1 decimation factor" ???
No. Typically a sigma-delta converter uses a much higher oversampling ratio than that. An 8:1 ratio would normally not be sufficient to give an 8-bit accurate output, it would be more like 80:1 or greater. The higher the oversample ratio, the better the signal-noise ratio of the filtered output and the easier the filtering becomes.
 

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