How to design a dynamic clamp?

[kukurigu]

Hello!

I need to design a dynamic clamp circuit for about 5V. I need it because there is an internal regulator with PMOS in my IC and when a big positive step appears on VDDext, VDDint jumps for a while and could destroy the core cells. I dont want to use static clamp because VDDint is also almost 5V and this could cause problems.

 

[goodboy_pl]

Look for TL431 datasheet in the web (TI or other manufacturer!), there are several useful hints for your problem like using shunt regulator to control voltage like a zener diode, for this u need a band gap reference a wideband comparator and a NMOS!

Maybe useful!

also u can use two stage regulator; one for input noise reduction (slow) and one for output regulation (fast).

BEST!