NMOS process is not compatible to CMOS process. The logic cell design is different. Therefore, direct translation is not possible.
In order to convert to FPGA, you need the verilog or logic function netlist. But not the gate level netlist. The translation is very easy. You can read it from the manual of your FPGA synthesis tool
Nmos device and CMOS device is different implematation of a design. In the early day of MOS technolgy, people have problem in fabricate PMOS so most of the logic was implemnted by NMOS only. In term of circuit design there is a different of the design when you are design in NMOS or CMOS. Logic design are the same