Dec 23, 2009 #1 C chudong Newbie level 5 Joined Jul 25, 2007 Messages 8 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,320 Synchronous DCDC buck converter has output High side Power MOS and Low side Power Mos. And how to consider the layout for the latch up and ESD safe?
Synchronous DCDC buck converter has output High side Power MOS and Low side Power Mos. And how to consider the layout for the latch up and ESD safe?
Dec 23, 2009 #2 erikl Super Moderator Staff member Joined Sep 9, 2008 Messages 8,108 Helped 2,695 Reputation 5,370 Reaction score 2,305 Trophy points 1,393 Location Germany Activity points 44,123 Just respect all the PDK's ESD & latch-up rules: extended s/d widths (possibly partial) salicide blocking double (p+ & n+) guard rings for each powerMOS minimum distances
Just respect all the PDK's ESD & latch-up rules: extended s/d widths (possibly partial) salicide blocking double (p+ & n+) guard rings for each powerMOS minimum distances