I think S/C circuits also have their "feedback factor". You could find it in the "Design of analog cmos integrated circuit" written by Razavi and there're several thread about it (
https://www.edaboard.com/threads/43229/).
OK, now I know what you mean. I think, we have to go back to some definitions (in order to avoid misunderstandings).
The term "feedback factor" originates from linear time-continuous control theory and, therefore, is applicable also to amplifiers with feedback. And in this context, this factor determines stability properties of the system.
Note that this factor either is constant (frequency independent) or depending on frequency. In the latter case the factor is defined in the frequency domain.
Now the question: Can this definition resp. this view be transferred to sampled data systems?
Generally spoken, I think: No, because S/C circuits are described in the z-domain.
However, there may be one exception (and that's what Razavi did): During
one of the sampling phases (Razavi: "Amplification phase") one can treat the whole system as a linear and time continuos system and compute something like a "gain" in the frequency domain (
s-domain). Although none of the signals are sinusoidal ! And for this linear/time continuos model - applicable only during one clock phase - you can define a "feedback factor" in the s-domain.
Why this approach? As far as I can see, only for the purpose to compute the
step response (finding of the time constant of a first order system) during this particular phase.
But this does not mean that the whole S/C circuit is a feedback system with a "feedback factor".
(Remark: Don't blindly trust some answers/contributions in this or in other forums).
LvW