thanks Usman Hai and jiangxb.but why 4kT/Cs?is it because there are 4 capacitors(2 Cs and 2 Cf , and Cs=Cf)for fully-differential structure and 1.5bit per stage?
besides, there are 9 stages in all, and 8 stages have Cs and Cf(excluding S/H in front end), then how to consider thermal noise of Cs and Cf totally?SNR=S/R,then how to consider S and R respectively?
pls explain to me.thanks.
Added after 3 minutes:
besides, how to understand BWeff=BWorig/(1+gm*Ron) for the on-resistance of switch ?