Re: FPGA Diagnostics
The FPGA is configured whan the DONE pin is released. DONE is an open-drain output.
So, you need a pull-up at the DONE pin too. You could also connect multiple FPGA DONE pins togetter, and this way, when every FPGA have programmed, will this network goes to 1 (and enter FPGA into run mode).
As for the IO standard, the easiest way, once you ran the P&R, is to look at the generated log files. Some of those files are actually intended to be read! To make sure everything is OK.