brou
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Hi all,
I want to convert an sfixed number(0111.0) to another sfixed (01.110). Do you propose a faster implementation than this?
I tried to do:
but the synthesis tool implements this in low frequency.
Thanks!
I want to convert an sfixed number(0111.0) to another sfixed (01.110). Do you propose a faster implementation than this?
I tried to do:
Code VHDL - [expand] 1 2 3 4 5 signal a : sfixed(3 downto -1); signal b : sfixed(1 downto -3); a <= to_sfixed (7.0, a); -- a = "01110" = 7 b <= a; -- b = "01110"= 1.75
but the synthesis tool implements this in low frequency.
Thanks!
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