Here's another method:
Inject a unit current (1A) into the node whose cap value you want to measure, and run an AC analysis. The voltage [V] vs. frequency plot equates to the magnitude of the impedance Z[Ω] at this node. From any frequency-dependent value you can calculate the cap value.
If the impedance curve comprises a resistive part (horizontal part of the curve at (very) low frequencies, e.g. due to bias generation), the reactive part (of the cap) equals the resistive part at the -3dB frequency of the curve (because conductance and susceptance add quadratically).
You might want to run such an analysis for bias points of both logic states.
PS: Inject the unit current in series with your bias supply, or decouple it via a huge capacitance (e.g. 1F), otherwise it would short-circuit your bias supply.