Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to avoid or reduce noise?

Status
Not open for further replies.

Victory1981

Newbie level 6
Newbie level 6
Joined
May 21, 2003
Messages
12
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
177
Hi,everyone. I'm a newbie on circuit design. And I met some problems when I connected the digital circuit to the analog circuit. That's Noise! I have fought for noise for a week but the achievement was not as great as I expected. The digital noise affected the whole circuit greatly especially when the analog circuit had a low frequency(say, 500Hz or lower). Can some one come up with some rules for reducing noise from digital circuit?
What I already done:
1. connected 0.1uF between Vcc and Gnd for every IC.
2. analog circuit and digital circuit have seperated ground and are connected at one point.
 

flatulent

Advanced Member level 6
Advanced Member level 6
Joined
Jul 19, 2002
Messages
4,626
Helped
489
Reputation
980
Reaction score
151
Trophy points
1,343
Location
Middle Earth
Activity points
46,689
slower logic family

One trick is to use a slower logic family in the digital area. Another is to run the digital on the lowest power supply voltage that will work.

Do you have separate power planes that are only under their respective circuit areas? Run separate ground and power lines from both sections back to the powe supply.
 

BigBoss

Advanced Member level 6
Advanced Member level 6
Joined
Nov 17, 2001
Messages
5,523
Helped
1,574
Reputation
3,150
Reaction score
1,467
Trophy points
1,393
Location
Türkiye
Activity points
33,307
To reduce the noise for the mixed circuits some attentions should be paid..

- Very good seperated ground connections that are converged onto only one point which is power supply ground..
- Very clean noisless power supply
- Seperate VCC lines which are passed "feedthru" capacitors into concerned circuits
- On the VCC lines , some inductive low pass filters or SMD noise supressors( Murata , Epcos , Toko etc. ) must be placed
- For transient noises , for every digital circuit VCC, a small amount resistor and decoupling capacitors may be placed..
- If it's possible double sided PCB is much more better then should be screwed on the circuit housing with a cover copper clad
- High speed square waves create harmonics on either supply lines and signal lines , therefore shielding can be applicable and/or shielded cables mignt be used for signal lines and VCC lines if there isn't cost problem..
- Closed and magnetically isolated housings or boxes..
- And finally..PCB design must be very very carefully implemented

Noise problem is the one of the most difficult problem in electronics.. They should be very carefully analyzed and solutions must be applied regarding to rules and laws..

Regards
 

House_Cat

Advanced Member level 4
Advanced Member level 4
Joined
Feb 21, 2002
Messages
1,369
Helped
406
Reputation
812
Reaction score
97
Trophy points
1,328
Location
USA
Activity points
16,416
The "separated grounds" are not a magical way to prevent coupling between ananlog and digital. The important issue is the complete loop formed by each signal.

You need to look carefully at the return path for each trace, and ensure that none of the analog return paths are coupled to the digital return paths. If you have run traces for the analog signals that have the digital plane directly below or above them, you may have the return current for that trace flowing in parallel with a digital return path on the so-called digital ground.

Moreover, if there is a signal that cannot return directly to the source via the lowest impedance path on the nearest plane, it will eventually have to go thru that single via that connects your two ground planes. That point will then allow modulation of the return path across the via inductive impedance (ie 'noise' will be coupled from all other similar returns trying to complete the loop through the via).

Again - every signal is a loop. There has to be a well defined return path for every signal source. Try to think in three dimensions, and follow every signal path from source through sink and back to source. If you can't make a smooth, uninterrupted loop that is clear of fast risetime signal sources, you will have noise.
 

falling_stone

Member level 1
Member level 1
Joined
Jul 19, 2002
Messages
40
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Activity points
503
How to avoid or reduce noise? - low frequency noise

Dear Victory1981,
Please take a look at the following topic, there are some explanations about capacitive decoupling:
**broken link removed**

If You suffer mostly from the low-frequency noise, the best way to suppress it - using active regulation circuitry. Lets say that Your analog part requires +5V power supply, then take something higher (...8-12V) and use additional linear voltage regulator to reduce it to +5V with good capacitive coupling, this may reduce low-frequency noise by ~30-40dB. However be VERY carefull and check if all ot the mixed signal devices (ADCs/DACs or others even having I2C control from digital part, for example) will not latch up if the power from digital side will arrive before the analog power (since it takes time for voltage regulator to charge all the capacitive load and stabilize). If latching up may happen, then use some digital power supply delaying technics (either disabling power supply itself or switching its output voltage) that will ensure simultaneous powering-up of both analog and digital parts.

Best Regards,
F.S.
 

gauiver

Member level 5
Member level 5
Joined
May 10, 2003
Messages
90
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,288
Activity points
676
the noise is usually high frequency sigals before feeding your digital data to analog input use low pass filter filtering the high frequency data. also it depends upon the buffering capability of the digital ic's. the higher the buffering strength the higher the noise since a greater time is required to change speed. also try using high speed ic's. sometimes it is useful to vcc and gnd via capacitors to avoid noise due to fluctuation. the capacitor should be of high value.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top